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October 20, 2012

New Five-Year Effort to Develop Post-CMOS Next Generation Nanoelectronics

The National Institute of Standards and Technology (NIST) announced today the selection of the Nanoelectronics Research Initiative (NRI), a collaboration of several key firms in the semiconductor industry, to support university-centered research for the development of after-the-next-generation “nanoelectronics” technology. NRI is made up of participants from the semiconductor industry, including GLOBALFOUNDRIES, IBM, Intel, Micron Technology and Texas Instruments.

NIST will provide $2.6 million to the effort for up to five years, matched by $870 thousand each year from NRI. The program funds research at university centers around the country that are working to develop the fundamental nanoscale technologies that will be needed in the future to replace the aging CMOS (“complementary metal–oxide–semiconductor”) transistor technologies at the heart of today’s state-of-the-art electronics. Over the past few decades, silicon-based CMOS circuits have relentlessly followed a path of getting smaller and more complex and powerful. However, the basic underlying transistor technology is approaching physical limits.
One nanoelectronics approach studied by the NRI MIND center is nanomagnet logic (NML)--logic circuits that work by magnetic coupling between neighboring nanoscale magnets. Here, SEM (l) and magnetic force microscope (r) images show an NML circuit that adds binary numbers.
Credit: Courtesy SRC-NRI Midwest Institute for Nanoelectronics Discovery (MIND)




The new award is essentially the successor to an earlier five-year collaboration between NRI and NIST that also focused on the long-term goal of “developing the next logic switch.” The earlier program concentrated largely on the problem of developing the basic logic elements that are the building blocks of electronic devices. The new program will broaden the scope to consider novel circuit architectures and devices that combine logic with memory, analog and other functions to provide high “computational density.”

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