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April 27, 2012

20 nanometer, 14 nanometer chips and 3D ICs

EETimes - News from the GSA silicon summit.

* Next-generation 20 nm processes can support optimized versions for low power and high performance, according to an IBM expert.


* A variety of 3-D ICs (with through-silicon vias -TSVs) will hit the market in 2014 despite numerous challenges (cost and heat dissipation)

* CMOS scaling is slowing down but still viable through a 7 nm node.

* The follow-on 14 nm process using FinFETs will open up greater opportunities for a high performance version at up to 0.9 volts and a low power variant at down to 0.6 volts

* In addition, the 14 nm node could offer as much as twice the typical benefits of moving to a new node.




* Qualcomm is “very happy with” dense 2.5-D Xilinx FPGAs “we are playing with in the lab” for product prototyping

* Mobile applications processors for high-end smartphones will hit the market this year or next using TSVs to link to Wide I/O memories.

* “This 3-D technology is really powerful and we will see it in many places,” said Iyer of IBM which has already made working prototypes of server processors in TSV stacks with DRAMs.

* CPUs have 8-12 cores now “and want to go to 24 cores” with 3-D IC modules that stack DRAMs and heat sinks

* One IBM researcher showed ways to make devices with as few as 25 atoms, opening the door to a 7 nm, process node. “Until we get to 7 nm or so there are no fundamental issues we see,” said Iyer.

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