ICube unifies CPU and GPU into one core with four threads per core

Tweet ICube is a fabless semiconductor company developing semiconductor System-On-Chip (SOC) solutions based on our Harmony Unified Processor Technology, genuinely integrating two different processor types: a central processing unit (CPU) and a graphics processing unit (GPU), into one unified core. Founded by Silicon Valley veterans (Simon Moy, CTO was Principal Engineer at NVIDIA and Fred Chow, is Chief Scientist was Chief Scientist at SGI and principle engineer at MIPS) who are experts in processor, software and integrated circuit development, the strength of our engineering team enjoys international distinction. The company is based in China.

People don’t need another processor. People need new digital devices that are cheaper, with higher performance, and lower power consumption.

MVP is more cost-efficient than existing processors and is better positioned to ride the performance increases projected by Moore’s law, which in turn allows it to adequately meet the needs of emerging applications.

ICube has an Android SoC (system on a chip) with their own core processor technology based on parallel computing with optimizing compilers, parallel programming APIs, and tool sets to assist application migration.

Extremetech - The Harmony Unified Processing Architecture (and the first iteration of that architecture, the IC1) are described as consisting of “the Multi-Thread Virtual Pipeline parallel computing core (MVP), an independent instruction set architecture, an optimizing compiler, and the Agile Switch dynamic load balancer.” Elsewhere, the chip is described as a “parallel computing stream processor core.” We also know, based on available literature, that the chip uses both SMP (Symmetric Multi-Processing) and SMT (Simultaneous Multi-Threading).

At a larger feature size and slower clock speed the UPU has higher performance

The Harmony Unified Processor Technology sets a new industry standard of performance by processing up to four threads (tasks) in each core. This contrasts with existing cores in the market that are limited to a single thread per core.

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