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May 25, 2011

Intel 3-D transistor design is a variant of FinFET developed at UC Berkeley

Intel’s 3-D Tri-Gate transistor will be used in 22-nanometer-technology microprocessors slated for high-volume manufacturing by the end of the year.


In 2000, the Berkeley researchers predicted that FinFET technology could be scaled down to at least 10 nanometers and estimated that it would take about 10 years for the new transistor to move into high-volume production.

In its May 2011 announcement of the 3-D Tri-Gate transistor, Intel is introducing a major technical breakthrough in integrated circuit technology. The combination of performance improvement and power reduction is slated to enable innovations across a range of products, from the smallest handheld devices to powerful cloud-based computing servers.

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