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November 09, 2010

High On/Off Ratio Graphene Nanoconstriction Field Effect Transistor

Arxiv - High On/Off Ratio Graphene Nanoconstriction Field Effect Transistor Graphene transistors with current on/off ratios greater than 1000 could be suitable for digital electronics applications say the researchers, who now hope to increase the efficiency of their top-down fabrication process to produce integrated circuits containing NCFETs

We report a method to pattern monolayer graphene nanoconstriction field effect transistors (NCFETs) with critical dimensions below 10 nm. NCFET fabrication is enabled by the use of feedback controlled electromigration (FCE) to form a constriction in a gold etch mask that is first patterned using conventional lithographic techniques. The use of FCE allows the etch mask to be patterned on size scales below the limit of conventional nanolithography. We observe the opening of a confinement-induced energy gap as the NCFET width is reduced, as evidenced by a sharp increase in the NCFET on/off ratio. The on/off ratios we obtain with this procedure can be larger than 1000 at room temperature for the narrowest devices; this is the first report of such large room temperature on/off ratios for patterned graphene FETs.

18 page pdf


To summarize, using a gold etch mask narrowed by feedback controlled
electromigration, we are able to fabricate monolayer graphene NCFETs with widths
ranging from 100nm to sub-10nm. Devices with widths below 10 nm exhibit room
temperature on/off current ratios larger than 1000, a level that is sufficient for use in advanced digital electronics. Additionally, sub-10nm devices have a relatively low on state resistance and show ambipolar behavior. These point contact like graphene NCFETs open up a route to verify theoretical predictions such as coherent electronic transport in subwavelength regime, and should provide a useful complement to measurements of graphene nanoribbons.

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