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May 11, 2010

Graphene Frequency Doubler Created

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Applied Physics Letters - A high-performance top-gate graphene field-effect transistor based frequency doubler has been made

A high-performance top-gate graphene field-effect transistor (G-FET) is fabricated, and used for constructing a high efficient frequency doubler. Taking the advantages of the high gate efficiency and low parasitic capacitance of the top-gate device geometry, the gain of the graphene frequency doubler is increased about ten times compared to that of the back-gate G-FET based device. The frequency response of the frequency doubler is also pushed from 10 kHz for a back-gate device to 200 kHz, at which most of the output power is concentrated at the doubled fundamental frequency of 400 kHz.


* a graphene based frequency doubler can provide more than 90% converting efficiency, while the corresponding value is not larger than 30% for conventional frequency doubler

* IBM recently showed that graphene transistor can operate up to 100 GHz, and the group at Peking University believes that the material may even still operate well in the THz regime. “This is very exciting,” Wang says, “because a frequency doubler with high frequency and high efficiency can be very expensive. Our device is cheaper - only consisted by one transistor - but with much higher efficiency.” (2008) Top-gated graphene Field-effect-transistors formed by decomposition of SiC were created by researchers from Purdue.

Other Graphene Research from 2010

Arxiv - Scalability of Atomic-Thin-Body (ATB) Transistors Based on Graphene Nanoribbons

A general solution for the electrostatic potential in an atomic-thin-body (ATB) field-effect transistor geometry is presented. The effective electrostatic scaling length, λeff, is extracted from the analytical model, which cannot be approximated by the lowest order eigenmode as traditionally done in SOI-MOSFETs. An empirical equation for the scaling length that depends on the geometry parameters is proposed. It is shown that even for a thick SiO2 back oxide λeff can be improved efficiently by thinner top oxide thickness, and to some extent, with high-k dielectrics. The model is then applied to self-consistent simulation of graphene nanoribbon (GNR) Schottky-barrier field-effect transistors (SB-FETs) at the ballistic limit. In the case of GNR SB-FETs, for large λeff, the scaling is limited by the conventional electrostatic short channel effects (SCEs). On the other hand, for small λeff, the scaling is limited by direct source-to-drain tunneling. A subthreshold swing below 100mV/dec is still possible with a sub-10nm gate length in GNR SB-FETs.


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