Researchers are making progress in developing new types of transistors, called finFETs, which use a finlike structure instead of the conventional flat design, possibly enabling engineers to create faster and more compact circuits and computer chips. The fins are made not of silicon, but from a material called indium-gallium-arsenide, as shown in this illustration. (Birck Nanotechnology Center, Purdue University)
The fins are made not of silicon, like conventional transistors, but from a material called indium-gallium-arsenide. Called finFETs, for fin field-effect-transistors, researchers from around the world have been working to perfect the devices as potential replacements for conventional transistors.
The Purdue researchers are the first to create finFETs using a technology called atomic layer deposition. Because atomic layer deposition is commonly used in industry, the new finFET technique may represent a practical solution to the coming limits of conventional silicon transistors.
In addition to making smaller transistors possible, finFETs also might conduct electrons at least five times faster than conventional silicon transistors, called MOSFETs, or metal-oxide-semiconductor field-effect transistors.
“The potential increase in speed is very important,” Ye said. “The finFETs could enable industry to not only create smaller devices, but also much faster computer processors.”
Paper:
First Experimental Demonstration of 100 nm Inversion-mode InGaAs FinFET through Damage-free Sidewall Etching
The first well-behaved inversion-mode InGaAs FinFET with gate length down to 100 nm with ALD Al2O3 as gate dielectric has been demonstrated. Using a damage-free sidewall etching method, FinFETs with Lch down to 100 nm and WFin down to 40 nm are fabricated and characterized. In contrast to the severe short-channel effect (SCE) of the planar InGaAs MOSFETs at similar gate lengths, finFETs have much better electro-static control and show improved S.S., DIBL and VT roll-off and less degradation at elevated temperatures. The SCE of III-V MOSFETs is greatly improved by the 3D structure design. The more accurate Dit estimation from the S.S. is also presented.
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