October 16, 2009

Direct Computer Memory Digital Pictures Accelerates Progress to Cheap Gigapixel Cameras

New Scientist reports that Technical University of Delft researchers have found that carefully focus light arriving on an exposed memory chip, the charge stored in every cell corresponds to whether that cell is in a light or dark area. The chip is in effect storing a digital image. This technique can increase the pixel resolution by 100 times over current camera technology.

A memory chip needs none of the current conversion circuitry used in current digital cameras, as it creates digital data directly. As a result, says Vetterli, the memory cell will always be 100 times smaller than CMOS sensor cells; it is bound to be that way because of the sheer number of signal-conditioning transistors the CMOS sensor needs around each pixel. For every pixel on one of today's sensors, the memory-based sensor could have 100 pixels. A chip the size of a 10-megapixel camera sensor will have 100 times as many sensing cells if implemented in memory technology.

A gigapixel camera based on this will still take some work. Unlike the pixels in a conventional sensor, which record a greyscale, the cells in Charbon's memory-chip sensor are simple on-off devices: they can only store a digital 0 or 1, for which read either light or dark. To build a sensor that can record shades of grey, EPFL engineer Feng Yang, who presented the Kyoto paper, is developing a software algorithm that looks across an array of 100 pixels to estimate their overall greyscale value.

They hope to have a gigavision memory chip fabricated late this year and working early next.

Gigapixel cameras becoming sometime in the 2009-2015 time range is a prediction from 2006 that I made.

It was the eighth prediction in the computing section of 156 technology predictions made in 2006

The gigavision camera

We propose a new image device called gigavision camera. The main differences between a conventional and a gigavision camera are that the pixels of the gigavision camera are binary and orders of magnitude smaller. A gigavision camera can be built using standard memory chip technology, where each memory bit is designed to be light sensitive. A conventional gray level image can be obtained from the binary gigavision image by low-pass filtering and sampling. The main advantage of the gigavision camera is that its response is non-linear and similar to a logarithmic function, which makes it suitable for acquiring high dynamic range scenes. The larger the number of binary pixels considered, the higher the dynamic range of the gigavision camera will be. In addition, the binary sensor of the gigavision camera can be combined with a lens array in order to realize an extremely thin camera. Due to the small size of the pixels, this design does not require deconvolution techniques typical of similar systems based on conventional sensors.

Image Reconstruction in the Gigavision Camera (8 page pdf)

More Conventional 18 Megapixel Cameraphones

Silicon Image, Inc. introduced an 18-Megapixel image signal processor Intellectual Property (IP) core. The company claims that the new IP core, called "camerIC-18," supports resolutions ranging from 5MP to 18MP. The IP can "effectively place high-performance digital still camera features in mobile phones.

Standalone image signal processor (ISP) vendors like Zoran, applications processor suppliers like Texas Instruments, SoC companies such as Samsung Electronics and NEC have been working toward that goal.

Their design options range from merging ISP with CMOS image sensors (Samsung); creating a discrete ISP chip (Zoran); making ISP a part of application processor (TI); or integrating ISP inside a baseband chip for a mobile phone.

Super high resolution Camcorders too

Silicon Image hopes to offer with its camerIC-18 IP core is imaging bandwidth to support HD, 3D, 4K and higher resolution video camcorder ISP functions.

A 4K resolution camcorder design incorporating a camerIC-18 IP core and running at 30 frames per second will only require about 700k gates to be implemented in hardware, consuming as little as 125mW of power.

"Only 30 million instructions per second of CPU time are required to support this hardware design," claimed Richter, "making the camerIC-18 IP core one of the industry's highest performing, lowest cost, lowest power consumption camera processors."

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