South Korean researchers reported the first ever creation of a spin field-effect transistor, which had previously existed only in theory, claiming it to be a breakthrough in the emerging field of spintronics.
Short for spin-based electronics and also called magnetoelectronics, spintronics, is an up-and-coming technology that focuses on the harnessing of the spin of particles, with the ultimate goal of unlocking
infinitea lot computing power and storage from the process.
Korea Institute of Science and Technology (KIST) researchers led by Han Suk-hee described the demonstration of a spin-injected field effect transistor, which is based on a semiconducting channel with two ferromagnetic electrodes.
The transistor's basic structure of source, gate and drain is similar to the complementary metal-oxide-semiconductor (CMOS) model used for making microprocessors and other integrated circuits. However, Han's transistor is different in that the source and drain are made of ferromagnetic materials and that the injected spins are controlled by gate voltage.
Control of Spin Precession in a Spin-Injected Field Effect Transistor
Spintronics increases the functionality of information processing while seeking to overcome some of the limitations of conventional electronics. The spin-injected field effect transistor, a lateral semiconducting channel with two ferromagnetic electrodes, lies at the foundation of spintronics research. We demonstrated a spin-injected field effect transistor in a high-mobility InAs heterostructure with empirically calibrated electrical injection and detection of ballistic spin-polarized electrons. We observed and fit to theory an oscillatory channel conductance as a function of monotonically increasing gate voltage.
16 pages of supplemental information
A high electron mobility transistor with an InAs active layer is used as a spin transport channel. The epitaxial layers comprise an In0.52Al0.48As buffer layer (300 nm), an In0.52Al0.48As n-doped (4×1018 cm−3) carrier supply layer (7 nm), an In0.52Al0.48As layer (6 nm), an In0.53Ga0.47As layer (2.5 nm), an InAs quantum well (2 nm) acting as a twodimensional electron gas (2DEG) channel, an In0.53Ga0.47As layer (13.5 nm), an In0.52Al0.48As layer (20 nm), and an InAs capping layer (2 nm). The In0.52Al0.48As and In0.53Ga0.47As cladding layers act as potential barriers that confine electrons to the quantum well.
The InAs channel was defined using photolithography and Ar-ion milling.