Researchers at UC Santa Barbara have discovered what limits our ability to reduce the size of capacitors, often the largest components in integrated circuits, down to the nanoscale. By finding the source of the problem, practical guidelines for minimizing the effects can be found and smaller thin film devices can be made. A roadblock to smaller and faster computers and electronics will be removed Nicola Spaldin, a professor in the Materials Department of the College of Engineering, and her collaborator, post-doctoral researcher Massimiliano Stengel, used quantum mechanical calculations to prove that a so-called “dielectric dead layer” at the metal-insulator interface is responsible for the observed capacitance reduction. Metals with good screening properties can be used to improve the properties.
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