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August 10, 2006

Automatic Hardware acceleration methods 10 to 30 times faster

A discussion of encoding with automated methods (so no hand optimization) software algorithms in fpga hardware and getting 10 to 30 times faster. Recent advances in C-to-FPGA design methodologies and tools facilitate the rapid creation of hardware-accelerated embedded systems.


C to HDL design flow Converting C code to an HDL (Hardware Description Language) accelerator with a C-to-HDL tool is an efficient method for creating hardware coprocessors.

This is relevant for supercomputers and getting flexible and cheap speed for commonly used software.

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