Paulo Gargini, director of technology strategy at Intel, explains where processor technology is headed
MEMS with its biggest current application being car sensors at 60 million units are too low volume for Intel. There are some interesting possibilities in wireless, making the array of an antenna adjustable by nanotechnology, for example. In five years, MEMS will be much more interesting for Intel.
From 2001 to 2002, 70 percent of carbon nanotubes Intel produced in the labs were semiconducting. Now it is 90 percent. Between 2012 and 2015 Intel plans to have carbon nanotube semiconductors in production. They do not expect them to be mainstream.
For chip stacking, the power dissipation must be controlled. Five to eight or ten packages can be stacked without too much problem. Most mobiles use a microcontroller with NVRAM and RAM stacked. The one on top is very thin, making it very easy to take heat out of the top. Intel is learning to take heat out of the bottom. They'll start with two, learn how to do that, and move on.
Capacitance times mobility sets performance. We've been concentrating on capacitance, because it comes for free with scaling. Now we've got to look at mobility. Strained silicon accelerates mobility by up to a factor of two, but then you reach the limits of silicon. So what else has a high mobility? There are at least six or seven semiconductors with higher mobility. How do you make them? You can't make wafers like you can at the moment. What we can do is selectively deposit other materials on the silicon. So you can't make a [element groups] III/V wafer, but you can deposit the materials on the wafer. Replace islands of silicon with islands of other semiconductors, and you're in a whole new world. Expect it in the second half of next decade.